The Effects of Supply Voltage Disturbances on Frequency Converters with an Active Front End
Lampinen, Jukka Tapani (2015)
Lampinen, Jukka Tapani
2015
Sähkötekniikan koulutusohjelma
Tieto- ja sähkötekniikan tiedekunta - Faculty of Computing and Electrical Engineering
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Hyväksymispäivämäärä
2015-11-04
Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:tty-201510141640
https://urn.fi/URN:NBN:fi:tty-201510141640
Tiivistelmä
This thesis studies the current performance of a Vacon 100 frequency converter with an integrated Active Front End (AFE) in supply voltage disturbance events, using a simulation model and a test bench. An AFE is a power electronic device that is used to replace a passive diode rectifier in a frequency converter. It enables bidirectional power flow, low harmonic distortion in phase currents, and better tolerance to supply voltage disturbances due to DC link voltage control.
The main focus of this thesis is on voltage dips and their effects on the frequency converter. A voltage dip is a brief decrease in supply voltage that is caused by faults in the supply grid, or energising large loads, such as electric motors. The aim of this thesis is to find the deepest voltage dips the frequency converter can tolerate and still operate normally, and what factors are limiting the operation of an AFE during the disturbance events. Using simulated and measured results, voltage dip immunity curves are drawn and compared to the requirements in standards IEC 61800-3 and IEEE P1668.
Standards, such as the IEC 61000 series, IEEE P1668, and EN50160:2010, give requirements and recommendations for the immunity of electrical equipment. IEC 61000 includes general EMC requirements, and the upcoming standard, IEEE P1668, is focused purely on voltage dip testing. IEEE P1668 is based on the power quality surveys conducted by EPRI and CIGRE, as well as the current SEMI F47 and IEC 61000-4-11/34 standards for the testing of electrical equipment. IEEE P1668 introduces a requirement for tests concerning symmetrical three-phase dips, which is not required in any current standards. In standards, the requirements for equipment immunity against voltage dips are presented usually as voltage dip immunity curves for each type of voltage dip.
Simulations and tests are made for the three most common types of voltage dips. The results show that the tested frequency converter can easily tolerate a symmetrical three phase voltage dip with 40 % of supply voltage for at least 500 ms. Asymmetrical voltage dips trigger a phase supervision fault at a remaining voltage of 55 % in 10 ms voltage dips. Longer voltage dips generally cause a fault at dips of under 80 % voltage. When operating in generator mode, the fault limits are at a slightly lower level. The tested frequency converter fulfills the requirements in IEC 61800-3 and IEEE P1668. Symmetrical voltage dips do not cause faults easily. The asymmetric cases cause faults at shallow voltage dips, due to a strict voltage unbalance limit. The effect of a weak grid is also tested using the simulation model. It is discovered that a weak supply grid has no effect on the performance of the frequency converter. Further work is aimed at testing voltage dips that have a duration less than 10 ms. Tests are also needed in a strong and a weak supply grid to validate the simulations.
The main focus of this thesis is on voltage dips and their effects on the frequency converter. A voltage dip is a brief decrease in supply voltage that is caused by faults in the supply grid, or energising large loads, such as electric motors. The aim of this thesis is to find the deepest voltage dips the frequency converter can tolerate and still operate normally, and what factors are limiting the operation of an AFE during the disturbance events. Using simulated and measured results, voltage dip immunity curves are drawn and compared to the requirements in standards IEC 61800-3 and IEEE P1668.
Standards, such as the IEC 61000 series, IEEE P1668, and EN50160:2010, give requirements and recommendations for the immunity of electrical equipment. IEC 61000 includes general EMC requirements, and the upcoming standard, IEEE P1668, is focused purely on voltage dip testing. IEEE P1668 is based on the power quality surveys conducted by EPRI and CIGRE, as well as the current SEMI F47 and IEC 61000-4-11/34 standards for the testing of electrical equipment. IEEE P1668 introduces a requirement for tests concerning symmetrical three-phase dips, which is not required in any current standards. In standards, the requirements for equipment immunity against voltage dips are presented usually as voltage dip immunity curves for each type of voltage dip.
Simulations and tests are made for the three most common types of voltage dips. The results show that the tested frequency converter can easily tolerate a symmetrical three phase voltage dip with 40 % of supply voltage for at least 500 ms. Asymmetrical voltage dips trigger a phase supervision fault at a remaining voltage of 55 % in 10 ms voltage dips. Longer voltage dips generally cause a fault at dips of under 80 % voltage. When operating in generator mode, the fault limits are at a slightly lower level. The tested frequency converter fulfills the requirements in IEC 61800-3 and IEEE P1668. Symmetrical voltage dips do not cause faults easily. The asymmetric cases cause faults at shallow voltage dips, due to a strict voltage unbalance limit. The effect of a weak grid is also tested using the simulation model. It is discovered that a weak supply grid has no effect on the performance of the frequency converter. Further work is aimed at testing voltage dips that have a duration less than 10 ms. Tests are also needed in a strong and a weak supply grid to validate the simulations.