A Comparative Assessment of Open-Source AXI Verification IPs

Abstract

Verification has become one of the most time-consuming and resource-intensive phases of modern System-on-Chip (SoC) design. As the AMBA AXI protocol continues to dominate the current SoC interconnect architecture, the demand for reliable, reusable and high-quality VIPs has developed accordingly. Commercial AXI VIPs from Synopsys, Cadence, Siemens, and AMD/Xilinx are widely used in industry due to their sophisticated automation capabilities, rich protocol checkers, integrated debug environments, and well-established ecosystems. Concurrently, a number of open-source AXI VIPs are available (including cocotbextaxi, OSVVM UVVM, and the ZipCPU AXI Formal Property Suite), providing cost-effective, accessible solutions. Despite their increasing adoption, there is limited literature that systematically compares these open-source solutions with commercial VIPs. This thesis presents a comparative assessment of commercial and open-source AXI verification IPs. A Systematic Literature Review (SLR) methodology is used to identify, classify, and analyze relevant academic works, vendor documentation, and community resources. The comparison focuses on functional coverage and protocol compliance, verification methodology and toolchain compatibility, automation and debugging features, and community maturity, documentation, and licensing models. The findings show that commercial VIPs are well-established in protocol coverage, regression automation, assertion libraries, and toolchain integration, making them suitable for large-scale industrial SoC projects. Open-source VIPs, while generally less automated and comprehensive, demonstrate strong potential, especially in flexibility, extensibility, and accessibility. Frameworks such as cocotbext-axi and OSVVM deliver practical verification capabilities for AXI4 and AXI4-Lite systems, and formal property suites offer mathematically rigorous correctness checking. Overall, this work emphasizes the growing prevalence of open-source AXI VIPs, identifies gaps, and suggests areas for further study/hybrid verification flows. The goal is to help engineers, researchers, and tool developers choose, integrate, and enhance AXI verification components for better, more accessible SoC verification.