Porting an OpenCL C Compiler on Intel FPGAs
Jamil, Zainab (2025)
2025
Tietotekniikan DI-ohjelma - Master's Programme in Information Technology
Informaatioteknologian ja viestinnän tiedekunta - Faculty of Information Technology and Communication Sciences
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Hyväksymispäivämäärä
2025-12-09
Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:tuni-2025120811377
https://urn.fi/URN:NBN:fi:tuni-2025120811377
Tiivistelmä
Field Programmable Gate Arrays (FPGAs) play a critical role in accelerating compute-intensive tasks in areas such as scientific simulation, signal processing, and machine learning. Their reconfigurable architecture and ability to leverage extensive hardware-level parallelism make them well-suited for High-Performance Computing (HPC) and data analytics.
Despite their significance, the widespread adoption of FPGAs is hindered by complex programming models, limited tool support and dependence on vendor-specific toolchains that restrict portability. This work addresses these challenges by extending a vendor-neutral, open-source OpenCL C compiler to support Intel FPGA accelerators. The integration adds backend support for the Intel FPGA acceleration flow, implements driver-level abstractions for device interaction with Intel FPGAs, and demonstrates a proof-of-concept on an Intel Agilex PCIe-based accelerator. The proposed flow is modular, enabling replication and flexible integration of tools across the compiler ecosystem.
Experimental evaluation against Intel OneAPI using PolybenchGPU OpenCL benchmarks demonstrates equivalent and competitive performance on 55% of cases. Synthesized designs achieve an approximate frequency of 48% of OneAPI results. These findings demonstrate the feasibility of vendor-agnostic FPGA acceleration within open-source ecosystems and contribute to a modular backend framework for Intel FPGA devices.
Despite their significance, the widespread adoption of FPGAs is hindered by complex programming models, limited tool support and dependence on vendor-specific toolchains that restrict portability. This work addresses these challenges by extending a vendor-neutral, open-source OpenCL C compiler to support Intel FPGA accelerators. The integration adds backend support for the Intel FPGA acceleration flow, implements driver-level abstractions for device interaction with Intel FPGAs, and demonstrates a proof-of-concept on an Intel Agilex PCIe-based accelerator. The proposed flow is modular, enabling replication and flexible integration of tools across the compiler ecosystem.
Experimental evaluation against Intel OneAPI using PolybenchGPU OpenCL benchmarks demonstrates equivalent and competitive performance on 55% of cases. Synthesized designs achieve an approximate frequency of 48% of OneAPI results. These findings demonstrate the feasibility of vendor-agnostic FPGA acceleration within open-source ecosystems and contribute to a modular backend framework for Intel FPGA devices.