Advanced Optimized Pulse Patterns for Medium-Voltage Drives
Koukoula, Isavella (2025)
Tampere University
2025
Tieto- ja sähkötekniikan tohtoriohjelma - Doctoral Programme in Computing and Electrical Engineering
Informaatioteknologian ja viestinnän tiedekunta - Faculty of Information Technology and Communication Sciences
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Väitöspäivä
2025-10-31
Julkaisun pysyvä osoite on
https://urn.fi/URN:ISBN:978-952-03-4093-3
https://urn.fi/URN:ISBN:978-952-03-4093-3
Tiivistelmä
This thesis focuses on optimal modulation methods for power converters in medium-voltage drive systems. In such applications, the switching-to-fundamental frequency ratio is kept low to minimize the losses of the converter. For this reason, optimized pulse patterns (OPPs) can offer a favorable solution as they can achieve output currents of the highest quality possible while keeping the switching losses low.
This work aims to develop advanced OPPs to achieve enhanced load-friendly and/or converter-friendly operation by accounting for secondary objectives in the optimization process. Specifically, the load-friendly operation is enhanced by limiting the common-mode voltage (CMV), which can damage the machine bearings. For the converter-friendly operation, the full utilization of the converter capabilities is considered as an additional objective. To this aim, the power losses of the semiconductor devices are constrained to improve the converter efficiency and enhance its reliability. Additionally, the operation of the semiconductor devices close to their thermal limits over a wide range of operating points and conditions is considered.
To achieve superior load and converter-friendly operation, the symmetry and switching properties of the OPPs are relaxed. This allows obtaining solutions with a more favorable trade-off between conflicting objectives. As a result, the proposed enhanced load-friendly OPPs can reduce the CMV while decreasing the distortions in the output current up to 1/3 of that of the state-of-the-art methods with the same feature. Additionally, the proposed converter-friendly OPPs can produce the same worst-case losses, or junction temperature, as the conventional OPPs while reducing the output current distortions by up to 36.7%. Concurrently, they can decrease the total power losses of the semiconductor devices by up to 9% while matching the harmonic performance of the conventional OPPs. Finally, this thesis develops efficient methods for the computation of these advanced OPPs. For some of these OPPs, the proposed methodologies can reduce their computation time by up to 95% compared to the straightforward brute-force computational approach.
This work aims to develop advanced OPPs to achieve enhanced load-friendly and/or converter-friendly operation by accounting for secondary objectives in the optimization process. Specifically, the load-friendly operation is enhanced by limiting the common-mode voltage (CMV), which can damage the machine bearings. For the converter-friendly operation, the full utilization of the converter capabilities is considered as an additional objective. To this aim, the power losses of the semiconductor devices are constrained to improve the converter efficiency and enhance its reliability. Additionally, the operation of the semiconductor devices close to their thermal limits over a wide range of operating points and conditions is considered.
To achieve superior load and converter-friendly operation, the symmetry and switching properties of the OPPs are relaxed. This allows obtaining solutions with a more favorable trade-off between conflicting objectives. As a result, the proposed enhanced load-friendly OPPs can reduce the CMV while decreasing the distortions in the output current up to 1/3 of that of the state-of-the-art methods with the same feature. Additionally, the proposed converter-friendly OPPs can produce the same worst-case losses, or junction temperature, as the conventional OPPs while reducing the output current distortions by up to 36.7%. Concurrently, they can decrease the total power losses of the semiconductor devices by up to 9% while matching the harmonic performance of the conventional OPPs. Finally, this thesis develops efficient methods for the computation of these advanced OPPs. For some of these OPPs, the proposed methodologies can reduce their computation time by up to 95% compared to the straightforward brute-force computational approach.
Kokoelmat
- Väitöskirjat [5161]