Fully Digital On-Chip Wideband Background Calibration for Channel Mismatches in Time-Interleaved Time-Based ADCs
Järvinen, Okko; Kempi, Ilia; Unnikrishnan, Vishnu; Stadius, Kari; Kosunen, Marko; Ryynänen, Jussi (2022)
Järvinen, Okko
Kempi, Ilia
Unnikrishnan, Vishnu
Stadius, Kari
Kosunen, Marko
Ryynänen, Jussi
2022
IEEE Solid-State Circuits Letters
Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:tuni-202303012685
https://urn.fi/URN:NBN:fi:tuni-202303012685
Kuvaus
Peer reviewed
Tiivistelmä
This letter presents a fully integrated on-chip digital mismatch compensation system for time-based time-interleaved (TI) data converters. The proposed digital compensation features blind calibration of gain, offset, and timing mismatches. The implemented system uses time-based sampling clock mismatch detection, achieving convergence within 32K samples, which is on par with analog-assisted background methods. A specialized filter structure compensates for timing mismatches of magnitude up to 0.21 of the sampling period, nearly triple the range of other published digital compensation methods, and is effective for input signals up to 0.92 Nyquist bandwidth. The on-chip digital correction achieves suppression of all mismatch tones to levels below −60 dBc while running fully in the background. The operation is demonstrated with an 8× TI 2-GS/s analog-to-digital converter (ADC) prototype chip implemented in a 28-nm CMOS process.
Kokoelmat
- TUNICRIS-julkaisut [20247]