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Coarse-grained reconfigurable architectures for radio baseband processing: A survey

Hassan, Zohaib; Ometov, Aleksandr; Lohan, Elena Simona; Nurmi, Jari (2024-09)

 
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Coarse-grained_reconfigurable_architectures_for_radio_baseband_processing_A_survey.pdf (1.969Mt)
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Hassan, Zohaib
Ometov, Aleksandr
Lohan, Elena Simona
Nurmi, Jari
09 / 2024

Journal of Systems Architecture
103243
doi:10.1016/j.sysarc.2024.103243
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Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:tuni-202408218230

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Peer reviewed
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Emerging communication technologies, such as 5G and beyond, have introduced diverse requirements that demand high performance and energy efficiency at all levels. Furthermore, the real-time requirements of different services vary significantly – increasing the baseband processor design complexity and demand for flexible hardware platforms. This paper identifies the key characteristics of hardware platforms for baseband processing and describes the existing processing limitations in traditional architectures. In this paper, Coarse-Grained Reconfigurable Architecture (CGRA) is examined as a prospective hardware platform and its characteristic features are highlighted as compared to traditionally employed architectures that make it a suitable candidate for incorporation as a domain-specific accelerator in baseband processing applications. We survey various CGRAs from the last two decades (2004-2023) and analyze their distinct architectural features which can serve as a reference while designing CGRAs for baseband processing applications. Moreover, we investigate the existing challenges toward developing CGRAs for baseband processing and explore their potential solutions. We also provide an overview of the emerging research directions for CGRA and how they can contribute towards the development of advanced baseband processors. Lastly, we highlight a conceptual RISC-V+CGRA framework that can serve as a potential direction toward integrating CGRA in future baseband processing systems.
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PL 617
33014 Tampereen yliopisto
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