Comparison of Cache Replacement Algorithms for RISC-V
Tamminen, Kalle (2023)
2023
Tietotekniikan DI-ohjelma - Master's Programme in Information Technology
Informaatioteknologian ja viestinnän tiedekunta - Faculty of Information Technology and Communication Sciences
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Hyväksymispäivämäärä
2023-09-25
Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:tuni-202309128111
https://urn.fi/URN:NBN:fi:tuni-202309128111
Tiivistelmä
Cache replacement policies play a significant role in the performance of cache memories. This thesis aims to find new replacement algorithm options for an existing RISC-V multicore processor design, the HPC subsystem of the Ballast System-on-Chip. HPC is a dual core design with two 64-bit CVA6 cores, and it features an L2 cache. The cache was originally designed with a simple but popular LRU replacement algorithm.
This work first looks at the cache replacement algorithms used by other existing RISC-V systems, and then at other research that has been carried out on the topic. Three algorithms are implemented as part of the HPC L2 cache: PLRUm, EBR, and Mockingjay.
The performance of these algorithms is evaluated in RTL simulation with a set of benchmark programs. The results show that more complex EBR and Mockingjay algorithms have a concrete performance improvement over LRU-based solutions in most cases, but the LRU algorithms do have an edge on a few benchmarks. The performance improvement provided by more advanced algorithm comes at a cost, as they require more memory and registers.
This work first looks at the cache replacement algorithms used by other existing RISC-V systems, and then at other research that has been carried out on the topic. Three algorithms are implemented as part of the HPC L2 cache: PLRUm, EBR, and Mockingjay.
The performance of these algorithms is evaluated in RTL simulation with a set of benchmark programs. The results show that more complex EBR and Mockingjay algorithms have a concrete performance improvement over LRU-based solutions in most cases, but the LRU algorithms do have an edge on a few benchmarks. The performance improvement provided by more advanced algorithm comes at a cost, as they require more memory and registers.