The Future of RISC? : Evaluating a Linux-capable RISC-V soft processor
Oikkonen, Emmi (2023)
2023
Sähkötekniikan DI-ohjelma - Master's Programme in Electrical Engineering
Informaatioteknologian ja viestinnän tiedekunta - Faculty of Information Technology and Communication Sciences
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Hyväksymispäivämäärä
2023-03-30
Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:tuni-202303213037
https://urn.fi/URN:NBN:fi:tuni-202303213037
Tiivistelmä
RISC-V is a novel but fast-growing processor architecture, with great promise for future market share. This means that embedded Linux systems powered by RISC-V will become common in the industry. Shipping a customized system will require a base platform with hardware and corresponding software to build a customized system on. For this reason, developing a base Linux software package for an embedded RISC-V system was seen as important.
This work began by defining what would and would not be done. The decision was to get a ready hardware and concentrate on software development. The rationale here was that hardware development is a very large task in itself, easily many times as complex as the corresponding software development. The work was then divided into separate parts: deciding a platform to develop on, extending its provided software package, fixing bugs and then evaluating what was achieved. The targets were set at developing a software platform that would be relatively "industry standard", and that would be easily buildable using common tools.
Looking into available RISC-V hardware platforms, the CVA6 platform stood out. It was only available for FPGA, but it was considered the best alternative, because Linux-compatible RISC-V devices hardly existed in early 2021, when the project was started. A compatible FPGA board was then purchased and the processor was verified to run fine on it.
The Buildroot-based software development kit provided with CVA6 was extended to ship with the U-Boot bootloader. The system was then ported to use the Yocto build environment. Several bugs were fixed, although a bug with the system occasionally hanging at boot could not be rooted out.
The resulting system is built using standard tools and standard components, and is extensible for different uses and on new platforms. It can thus be considered a success, as the criteria set for it were fulfilled. Future plans are also discussed, chiefly the prospect of porting the resulting system on devices derived from the CVA6 platform used here.
This work began by defining what would and would not be done. The decision was to get a ready hardware and concentrate on software development. The rationale here was that hardware development is a very large task in itself, easily many times as complex as the corresponding software development. The work was then divided into separate parts: deciding a platform to develop on, extending its provided software package, fixing bugs and then evaluating what was achieved. The targets were set at developing a software platform that would be relatively "industry standard", and that would be easily buildable using common tools.
Looking into available RISC-V hardware platforms, the CVA6 platform stood out. It was only available for FPGA, but it was considered the best alternative, because Linux-compatible RISC-V devices hardly existed in early 2021, when the project was started. A compatible FPGA board was then purchased and the processor was verified to run fine on it.
The Buildroot-based software development kit provided with CVA6 was extended to ship with the U-Boot bootloader. The system was then ported to use the Yocto build environment. Several bugs were fixed, although a bug with the system occasionally hanging at boot could not be rooted out.
The resulting system is built using standard tools and standard components, and is extensible for different uses and on new platforms. It can thus be considered a success, as the criteria set for it were fulfilled. Future plans are also discussed, chiefly the prospect of porting the resulting system on devices derived from the CVA6 platform used here.