Low voltage thin-film transistors with atomic layer deposited high-k dielectric
Ruhanen, Aleksi (2021)
Ruhanen, Aleksi
2021
Teknis-luonnontieteellinen DI-ohjelma - Master's Programme in Science and Engineering
Tekniikan ja luonnontieteiden tiedekunta - Faculty of Engineering and Natural Sciences
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Hyväksymispäivämäärä
2021-05-25
Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:tuni-202104273837
https://urn.fi/URN:NBN:fi:tuni-202104273837
Tiivistelmä
Atomic layer deposition (ALD) is a thin film deposition technique investigated as a method to solventlessly deposit gate insulators with thin-film transistors. Low temperature (<300°C) ALD combined with solution-processed semiconductor deposition would enable transistor fabrication on flexible substrates, which cannot withstand temperatures used in conventional silicon gate oxide processes. In this thesis, aluminum oxide and hafnium oxide dielectrics along with an indium oxide semiconductor solution are deposited on silicon wafers and glass slides to fabricate candidate thin-film transistors, and to fabricate metal-insulator-semiconductor capacitor test structures.
Dielectric thicknesses of 10-30nm were deposited at 120-300°C and the In2O3 was baked at 300°C. Dielectric thickness was measured through ellipsometry and roughness by atomic force microscopy (AFM). The 10 nm thick Al2O3 and HfO2 dielectrics proved highly leaky, with current densities of ~1mA/cm2 even under mild voltage bias. Thicker insulators, up to 30 nm, reduced leakage currents to ~1μA/cm2. General transistor performance proved poor, with common on-off ratios of less than 10^2, with the best device achieving a ratio of 10^4. Saturation electron mobilities were measured at around 1-10cm2V-1s-1, similar to what has been achieved in previous reports with the same semiconductor recipe. Density of interface traps in MOS-capacitors on n-type silicon were around 10^12–10^13 for both HfO2 and Al2O3 dielectrics. Leakage current mechanisms in capacitor structures was investigated with graphical methods, but no conclusive results were determined at this time.
ALD deposited gate dielectrics proved usable in thin-film transistors, but, owing to the poor performance, further research is required, with special focus on the semiconductor-insulator interface. If the process is improved without increasing the thermal budget, there should be no major barriers in fabricating transistors on flexible substrates such as polyimide and polyurethane
Dielectric thicknesses of 10-30nm were deposited at 120-300°C and the In2O3 was baked at 300°C. Dielectric thickness was measured through ellipsometry and roughness by atomic force microscopy (AFM). The 10 nm thick Al2O3 and HfO2 dielectrics proved highly leaky, with current densities of ~1mA/cm2 even under mild voltage bias. Thicker insulators, up to 30 nm, reduced leakage currents to ~1μA/cm2. General transistor performance proved poor, with common on-off ratios of less than 10^2, with the best device achieving a ratio of 10^4. Saturation electron mobilities were measured at around 1-10cm2V-1s-1, similar to what has been achieved in previous reports with the same semiconductor recipe. Density of interface traps in MOS-capacitors on n-type silicon were around 10^12–10^13 for both HfO2 and Al2O3 dielectrics. Leakage current mechanisms in capacitor structures was investigated with graphical methods, but no conclusive results were determined at this time.
ALD deposited gate dielectrics proved usable in thin-film transistors, but, owing to the poor performance, further research is required, with special focus on the semiconductor-insulator interface. If the process is improved without increasing the thermal budget, there should be no major barriers in fabricating transistors on flexible substrates such as polyimide and polyurethane