Computer arithmetic on quantum-dot cellular automata nanotechnology

Abstract

The traditional digital technologies are reaching their performance limits, and the desired growth of computing power can be continued only by adopting emerging circuit technologies and new design approaches into use. This thesis provides a practical view on the emerging quantum-dot cellular automata (QCA) nanotechnology, presenting techniques to construct high-density, performance optimized, and noise tolerant basic arithmetic circuits. Several novel arithmetic units are proposed, described at the logic, the pipeline, and the layout level, and verified using quantum mechanical simulation. Design analysis shows, that on the self-latching QCA nanotechnology, the basic serial and parallel arithmetic structures for addition, or multiplication, typically have comparable latency, but the throughput follows the degree of parallelism. The circuit area is dominated by the passive wiring overhead, characterized by a square-law dependency on operand word length. Hierarchical probabilistic analysis shows, that bit-stage level macro component reliability has about linear effect on the total reliability, while component types affect whole with weights determined by the word length, and the wiring dominates also the reliability. The power dissipation is analyzed near the ultimate limit of computation efficiency, using the Landauer’s principle, showing that irreversible information erasures consume significant power on molecular QCA, severely limiting the operating frequency. The studies in this thesis show, that QCA systems have to address emerging technology characteristics, that have not had much impact in traditional engineering work. Design optimization has to be started from the reliability and power challenges, which will determine the feasibility of any planned system.