Hyppää sisältöön
    • Suomeksi
    • In English
Trepo
  • Suomeksi
  • In English
  • Kirjaudu
Näytä viite 
  •   Etusivu
  • Trepo
  • TUNICRIS-julkaisut
  • Näytä viite
  •   Etusivu
  • Trepo
  • TUNICRIS-julkaisut
  • Näytä viite
JavaScript is disabled for your browser. Some features of this site may not work without it.

Energy-Efficient Instruction Delivery in Embedded Systems with Domain Wall Memory

Multanen, Joonas; Kari, Hepola; Khan, Asif Ali; Castrillon, Jeronimo; Jääskeläinen, Pekka (2021-10-04)

 
Avaa tiedosto
Energy_Efficient_Instruction_Delivery_in_Embedded_Systems_with_Domain_Wall_Memory.pdf (7.311Mt)
Lataukset: 



Multanen, Joonas
Kari, Hepola
Khan, Asif Ali
Castrillon, Jeronimo
Jääskeläinen, Pekka
04.10.2021


IEEE Transactions on Computers
doi:10.1109/TC.2021.3117439
Näytä kaikki kuvailutiedot
Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:tuni-202110277912

Kuvaus

Peer reviewed
Tiivistelmä
As performance and energy-efficiency improvements from technology scaling are slowing down, new technologies are being researched in hopes of disrupting results. Domain wall memory (DWM) is an emerging non-volatile technology that promises extreme data density, fast access times and low power consumption. However, DWM access time depends on the memory location distance from access ports, requiring expensive shifting. This causes overheads on performance and energy consumption. In this article, we implement our previously proposed shift-reducing instruction memory placement (SHRIMP) on a RISC-V core in RTL, provide the first thorough evaluation of the control logic required for DWM and SHRIMP and evaluate the effects on system energy and energy-efficiency. SHRIMP reduces the number of shifts by 36% on average compared to a linear placement in CHStone and Coremark benchmark suites when evaluated on the RISC-V processor system. The reduced shift amount leads to an average reduction of 14% in cycle counts compared to the linear placement. When compared to an SRAM-based system, although increasing memory usage by 26%, DWM with SHRIMP allows a 73% reduction in memory energy and 42% relative energy delay product. We estimate overall energy reductions of 14%, 15% and 19% in three example embedded systems.
Kokoelmat
  • TUNICRIS-julkaisut [9356]
Kalevantie 5
PL 617
33014 Tampereen yliopisto
oa[@]tuni.fi | Yhteydenotto | Tietosuoja | Saavutettavuusseloste
 

 

Selaa kokoelmaa

TekijätNimekkeetTiedekunta (2019 -)Tiedekunta (- 2018)Tutkinto-ohjelmat ja opintosuunnatAvainsanatJulkaisuajatKokoelmat

Omat tiedot

Kirjaudu sisäänRekisteröidy
Kalevantie 5
PL 617
33014 Tampereen yliopisto
oa[@]tuni.fi | Yhteydenotto | Tietosuoja | Saavutettavuusseloste